In simple terms, Synchronous Ethernet extends the use of a PLL (Phase locked loop) clock to transmit data. At a very crude level, this, and only this, is the whole conceptual working of Synchronous Ethernet.
At the physical layer, two Ethernet peer nodes are already synchronized through a PLL for the RX (receiving) end. A PLL works by using a negative feedback loop to lock. Just the way we tune a guitar: listening to a tuning-fork, plucking the string, comparing the sound and correcting the tension. In Ethernet, the receiving node monitors the incoming bits, compares their alignment and timing with its own, corrects it local oscillator and locks to the source. But, the story ends there. The extracted time is just used to receive the correct data by aligning clock to the incoming bits’ rise and fall times. But, when the same extracted clock is used to send the data out, it is called Synchronous Ethernet.
This post is in continuation to the series of posts on Synchronization in Telecommunication Networks. Previous posts:
- Clock synchronization in Telecommunication Networks (The Need)
- Synchronization in networks (The Basics)
Sync-E Hardware Expectations
The Sync-E concept, although straight forward, puts a lot of requirements at the hardware level for proper functioning. Few of these are:
- Jitter/Wander tolerance, filtering and transfer
- Reference Monitoring
- Detect disconnection and switchover or holdover
- Holdover stability
- Hitless reference switching
- Continuous averaging of locked reference
- Support for active and backup Timing Card and hitless switching
- Support 25, 125, 156.25 MHz and translation etc
Adhering to the standards the Synchronous Ethernet can provide better than 4.6 ppm accuracy across the network versus the conventional Ethernet (where free-running clocks have accuracy of 100 ppm between peer nodes).
Sync-E Software Requirements
The hardware would work efficiently with the given requirements. The software’s function in Synchronous Ethernet is more of a helping hand to the Hardware to function effectively. The ESMC (Ethernet Sync Message Channel) protocol is designed to communicate the Quality Level (QL) of the clock to the participating nodes. The nodes can thus decide, based on this information, the best source to lock to, thus forming a clock tree and hierarchy. The Sync-E standard (ITU-T G.8264) provides the rules to decipher the SSM (Synchronization Status Message) QLs.
The software standard defines the following:
- Message encapsulation and priority
- Quality level encoding (to inter-operate with SONET/SDH clock quality levels)
- Best reference selection and Fail-over Switching
- Handling bad PDUs (protocol data units) and preventing SSM floods
- Distinguishing & handling events and information
- Ten pps & five second rule: Ethernet’s slow-protocol PDUs have an upper limit of 10-pps and Sync-E follows this. Also, if a system does not receive ESMC packets for 5 seconds, it should switch-over to a different clock source.
ESMC frame format
ITU-T Recommendation G.8264 defines an Ethernet Synchronization Messaging Channel (ESMC) for Synchronous Ethernet links, in which Synchronization Status Messages (SSM) are exchanged. The format for ESMC messages was chosen to be an Ethernet slow protocol (i.e., the messages are sent to multicast Ethernet destination address 01-80-C2-00-00-02 and use Ether-Type 88-09).
ESMC is not a complex protocol and an ESMC packet contains two important fields, currently:
- Event Flag: This indicates whether the PDU is for information or indicates some event, like a change in clock quality level etc. Usually a PDU with the even flag set, is sent asynchronously, while the informational PDUs are sent at regular intervals according to the 10-pps rule.
- SSM Code: This is the Quality Level code and indicates the preciseness of the incoming clock so system software can decide whether to lock on to it. Its value can range from b0000 to b1111 i.e. PRC(0x02)/PRS(0x01) level down-to Do-not-use(0x0F). This code is also mapped directly to the SONET/SDH clock quality levels and standards.
The frame-format has reserved some fields for future use and extensions. A depiction would be like this:
Figure: An ESMC packet
New message types can be added by defining ITU-T subtypes and there are reserved field in the packet format to adjust for future requirements and improvements. ESMC is a one-way protocol (currently) where in the clock quality level is propagated from a better clock source and the receiver may use or ignore that information and event. What is important to note here is that, there is a lot of open field here for innovation, as, ESMC protocol has been designed to be flexible enough to support these enhancements.
How does Synchronous Ethernet fit in?
Synchronous Ethernet clocking distribution can be considered an extension of the current synchronization distribution network in TDM networks.
It does not impact any existing IEEE 802.3 specifications such as frequency tolerance, but refers to the new additional network element clock functionality using the OAM PDUs (protocol data units) to pass SSM (synchronization status message)
ITU is working on a new recommendation G.paclock
- Outlines requirements such as clock bandwidth, frequency accuracy, holdover and noise generation
- Proposal is to model Synchronous Ethernet as an SDH equipment slave clock (as defined in recommendation G.813)
We will meet with the IEEE-1588 synchronization technology in the next post.
Jagmeet Singh Hanspal is a Software Architect and has worked with various organizations like Ericsson, Juniper Networks, TranSwitch Semiconductors in the field of Telecommunications and Embedded Systems. His interests include Linux, Micro-controllers, Parallel Processing, Networks, Time Synchronization protocols, Data Visualization & Statistical analysis etc. You can connect with him on Linkedin